Intel Larabee details surface
Tiny URL: http://tinyurl.com/5rwv5qEarly details on Intel’s Larabee GPU, the nVidia killer, were unveiled today by Intel. The company is presenting a paper in SIGGRAPH on August 12th. The paper details a new approach to the software rendering 3-D pipeline, a many-core (many processor engines in a product) programming model and performance analysis for several applications.
The first product based on Larrabee will target the personal computer graphics market and is expected in 2009 or 2010. Larrabee will be the industry’s first many-core x86 Intel architecture, meaning it will be based on an array of many processors. The individual processors are similar to the Intel processors that power the Internet and the laptops, PCs and servers that access and network to it.
Initial product implementations of the Larrabee architecture will target discrete graphics applications, support DirectX and OpenGL, run existing games and programs. The tools will uses a native C/C++ programming model.
Here are some more details on the GPU
- The Larrabee architecture has a pipeline derived from the dual-issue Intel Pentium® processor, which uses a short execution pipeline with a fully coherent cache structure. The Larrabee architecture provides significant modern enhancements such as a wide vector processing unit (VPU), multi-threading, 64-bit extensions and sophisticated pre-fetching. This will enable a massive increase in available computational power combined with the familiarity and ease of programming of the Intel architecture.
- Larrabee also includes a select few fixed function logic blocks to support graphics and other applications. These units are carefully chosen to balance strong performance per watt, yet contribute to the flexibility and programmability of the architecture.
- A coherent on-die 2nd level cache allows efficient inter-processor communication and high-bandwidth local data to be access by CPU cores, making the writing of software programs simpler.
- The Larrabee native programming model supports a variety of highly parallel applications, including those that use irregular data structures. This enables development of graphics APIs, rapid innovation of new graphics algorithms, and true general purpose computation on the graphics processor with established PC software development tools.
- Larrabee features task scheduling which is performed entirely with software, rather than in fixed function logic. Therefore rendering pipelines and other complex software systems can adjust their resource scheduling based each workload’s unique computing demand.
- The Larrabee architecture supports four execution threads per core with separate register sets per thread. This allows the use of a simple efficient in-order pipeline, but retains many of the latency-hiding benefits of more complex out-of-order pipelines when running highly parallel applications.
- The Larrabee architecture uses a 1024 bits-wide, bi-directional ring network (i.e., 512 bits in each direction) to allow agents to communicate with each other in low latency manner resulting in super fast communication between cores.
- The Larrabee architecture fully supports IEEE standards for single and double precision floating-point arithmetic. Support for these standards is a pre-requisite for many types of tasks including financial applications.

